Renesas’s integrated space-grade POL regulator reduces BOM count as well as size, weight, and power for FGAs and DDR memory in satellite applications
By Gina Roos, editor-in-chief
Renesas Electronics Corp. has claimed the industry’s first single-chip synchronous buck and low dropout (LDO) regulator, targeting low-power FPGAs, DDR memory, and other digital loads for spaceflight payload applications. The ISL70005SEH point-of-load (POL) power solution reduces size, weight, and power (SWaP) by integrating a synch buck and LDO in one monolithic IC. The upshot: Satellite manufacturers can reduce their bill of materials (BOM) and power supply footprint for their medium Earth orbit (MEO) and geosynchronous Earth orbit (GEO) long duration missions.
The ISL70005SEH rad-hard dual output POL regulator delivers 95% high efficiency with the synch buck regulator and a low 75-mV dropout on the LDO regulator. It eases thermal management for systems with 3.3-V or 5-V power buses, and can support 3-A continuous output load current for the buck regulator and ±1 A for the LDO. The buck regulator uses a voltage mode control architecture and switches at a resistor adjustable frequency of 100 kHz to 1 MHz, enabling a smaller filter size.
Providing configurability for a variety of applications, the space-grade ISL70005SEH can be used as a dual-output regulator, DDR memory power solution or high-efficiency low noise regulator for RF applications. The LDO can source and sink current and accept input voltages as low as 775 mV to reduce unnecessary power dissipation. In addition, the externally adjustable loop compensation on the buck allows users to achieve an optimal balance of stability and output dynamic performance, said Renesas. It operates over the full military temperature range of -55°C to 150°C.
The device is wafer acceptance tested to 100 krad(Si) over high dose rate (HDR) and tested for ELDRS up to 75 krad(Si) over low dose rate (LDR). Single event effects (SEE) testing shows no single event latch-up (SEL) and single event burnout (SEB) at a linear energy transfer (LET) up to 86 MeV*cm2/mg. Single event transients (SETs) have been characterized at a LET range of 8.5 to 86 MeV*cm2/mg.
The ISL70005SEH is a single-chip power solution for both FPGA core and I/O rails and can be combined with Renesas’ analog signal chain ICs to create a satellite telemetry solution: ISL70444SEH 40-V quad operational amplifier, ISL71840SEH 30-V 16-channel multiplexer, ISL70591SEH 100 µA precision current source and ISL71090SEH12 1.25-V precision voltage reference.
The ISL70005SEH also combines with other Renesas power management ICs to form a complete power solution: ISL70061SEH 10-A PMOS load switch, ISL70321SEH quad power supply sequencer, ISL75051ASEH 3-A LDO, and ISL70003ASEH 9-A buck regulator.
The ISL70005SEH radiation-hardened dual output POL regulator is available now in a 28-lead ceramic dual flatpack package or in die form. An evaluation board is available.